試題詳解

15. A 900 MHz microcontroller must process each PWM cycle in ≤ 90 instruction cycles. An ISR currently compiles to 112 cycles. Which optimisation meets timing with least code change?
(A) Unroll loops
(B) Inline all function calls
(C) Move ISR to lower priority
(D) Switch to Thumb-2
(E) None of the above